Spurious charge

[roger smith x294]

>From prj at mail.ast.cam.ac.uk Thu Jun 22 03:24:47 1995

> Roger, 
> 
> I found your most recent 'ccd-world' clocking discussion interesting,
> but don't have time to repond fully now.  However, I would like
> to ask about spurious charge:
> 
> You said: 
> 'By the way, splitting the image (reading through both serial registers)
> halves the spurious charge since the number of parallel transfers is halved.'
>
> This implies such charge is predominantly parallel-clock induced. ok.
> In this case, when you examine a bias frame, do you see more noise in the 
> central image section, and less in the X-overscan/ underscan, of a row?
> What level of spurious charge do you see?
> WHich chips (tk1024, tk2048 or what)?
>
> We see more or less the same noise all across our bias-row.
> Any comments? 
>
> Cheers, Paul
> -------------------------------------------------------------------


Paul,

This table shows how Full Well and Spurious Charge vary with the setting of
P3-high for a TEK2048EB CCD (manufactured in late 1993, I think).

        Full    Spurious
P3_hi   Well	Charge   ....for quad readout.          
 (V)    Ke-     (e-/pix)           

2.0          	0.2
3.6	 60	0.4
5.0	155	0.8	....rather dissappointing full well for a 24um pixels, 
6.0    		1.7		so we explored the domain where surface full
7.0	260	3.7		well might be expected.

I made the above measurments some time ago and my records are not entirely
clear but it appears that at the time the other clock levels were:

	Low	High
P1	-8	+3.5	....we may need to play with P1/2-hi more to get more
P2	-8	+3.5		full well.
P3	-5.5	see below
TG	-8	+3.5        

Incidentally, the CCD appears to be linear (to within 0.5% or so) up to full
well (150 Ke-) with P3_hi=5V and starts to go non-linear near 190K with
P3-high=7V (full well=260 Ke-), which suggests that non- linearity is purely
an output amplifier effect, as one would hope.

The spurious charge was measured from the serial overscan edge amplitude in a
zero length dark frame, with the CCD well blocked from light.  It is a small
effect requiring many lines to be averaged in order to make it visible.

Operating temperature was 165 kelvin and dark current was about 3-4
e-/pix/hour.  The spurious charge is flat along the columns and lines.  I
don't know how to distinguish between spurious charge generation in a single
line and a uniform rate per pixel since the generation process occurs both
during erase and read, such that every pixel has passed through the entire CCD
at some time - either during the erase before the exposure or during readout.

Spurious charge seemed to be a strong function of P3-hi and a weak function of
P3-lo.  (P3 is the barrier phase.)  Why would P1 and P2 clock levels have less
effect?

All parallel clocks pass through slightly over-damped LRC filters to shape the
edges and provide good high frequency rejection of digital interference.  The
time constant is approximately RC=30 us.  ( sqrt(LC)=11us ) 
L=500 uH, C=210nF+C_CCD=~40 nF, R = 120 ohm

Does the spurious charge affect the noise.  ...Sure.  Its noise contribution
is seen to behave as another source of shot noise, and so we do see a
difference between the noise measured in the overscan and image areas unless
the spurious charge is insignificant compared to the square of the read noise.

Both our TEK2048EB's behave similarly.  I don't recall the figures for
our Tek 1K, STIS 2K, Thomson or various Lorals.  Ricardo or Alistair,
do you know any of these figures.

The better of our TEK2048EB's routinely delivers 2.3 e- noise on the telescope
and has consistently delivered 1.9 e- in the lab. (The gain is rather too high
at the long slope time where the ultra low noise is measured and so this mode
has not been released for general use, yet.)

For <10% noise degradation, spurious charge must be less than
2.3*2.3/5=1e-/pix.  Thus we reduce P3_high for the echelle spectroscopists at
the expense of an loss of full well.  They don't need much full well anyway
since the operate at high gain and the ADC saturates first.  The spurious
charge they see is worse than the figures quoted above when they bin (usually
in the spatial direction) thus piling several pixels worth of spurious charge
into into one read, making the requirement 2 or 4 times more stringent.

Dark current similarly multiplies by the binning factor and so our attention
soon shifts to this.  We confirmed recently that non-UV grade fused silica
windows can indeed luminesce (for days) after being exposed to light and thus
produce extraneously high "dark" current.

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Does anyone know whether there is some magic dV/dt threshold for parallel
clocks at which Spurious Charge generation switches off?
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My impression is that spurious charge depends more strongly on total voltage
swing than dV/dt.  I don't believe that this impression is consistent with
conventional wisdom!  If it were only dV/dt then using only slightly slower
slope control filters would get rid of the problem.  However, my experiments
do not seem to bear this out.  On the other hand, I have not pursued this
possibility very far.  Rich Reed, are you reading this?  I seem to recall that
you have some experience in this area.

Regards,

Roger		rsmith at noao.edu