Chip surface scans and more...

[Paddy Oates]

Hi folks,
	Well as you know I have now sorted out our problem with the Loral thin 
chips losing UV response when cold - in case you missed it, it had to do with 
what I suppose was water vapour contamination on the chip surface - a nice warm 
bake at regulo 10 (150C !!) did the trick.
	I am now in the process of testing our remainin devices. I have just 
had a look at the 1st of our Platinum Gate devices. Its QE warm and cold is 
excellemt but of course without UV flooding - Cant say Im sorry not to have to 
do that!!!
	I am getting around 80% QE 320nm-800nm with a steady fall beyond 800. 
This is great. I will be putting the data on the Web page today or tomorrow.
Have a look it on the Loral Page 

http::/www.ast.cam.ac.uk/~apo/docs/loral.html

The new data will be at 

http::/www.ast.cam.ac.uk/~apo/docs/loral-3.html

I hope to get imaging data on the device in the next few days - it wiol then 
got to the telescope.

My collegue Simon Tulloch has some information he has obtained by scanning the 
surface of one of our Tek CCDs, There's a pointer to it on my home page with an 
intro.-

http::/www.ast.cam.ac.uk/~apo/docs/ccds.html

or the reference for the picture and description direct is-

http::/www.ast.cam.ac.uk/~apo/docs/scans/tekscan.html

We have just taken delivery of 2 devices from EEV - a small AO chip (39 series) 
 80x80 pixels, thinned which we are looking at now and the second engineering 
device in the 42 contract - this is a thinned 4kx2k, 13u5 pixel device which I 
shall be looking at next week. We hope to get better than 2e noise at 1+1us 
sampling (as reported at the Cayman meeting). It would be reassuring to confirm 
a high UV QE for this device too.... we shall see...

Thats all the news for now- stay tuned

Paddy

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