CCD on-chip gain vs temperature

[Hopkinson, Gordon]

Posted to CCD-world:
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Hello CCD world

We haven't seen any significant gain change with temperature and I guess, as
you say, it is down to changes in the output node capacitance and the gain
of the on-chip MOSFET.

The QE in the red (and with some devices, in the blue also) does change
significantly.  There has been quite a lot of correspondence within CCD
world (and in recent papers) on this recently so I won't repeat it now.

What isn't talked about much is the change in offset voltage with
temperature.  A DC offset is caused by the clock on the last readout
register phase feeding through onto the output.  We have found that this
changes with temperature, particularly between about minus 20 and plus 20
degrees C.  It doesn't seem too bad as you get cold. It is quite CCD
dependent.

Best regards

Gordon Hopkinson
Sira Electro-optics Ltd

> ----------
> From: 	Ken Smith[SMTP:smithk at routes.com]
> Reply To: 	CCD-world at cfht.hawaii.edu
> Sent: 	29 April 1999 14:58
> To: 	CCD-world at cfht.hawaii.edu
> Subject: 	CCD on-chip gain vs temperature
> 
> Posted to CCD-world:
> -+-+-+-
> Dear CCD-World:
> 
> I am looking for any information or indication if CCD on-chip gain
> (electrons to
> volt conversion factor) changes with temperature.  I thought I would ask
> here first
> before doing any tests myself.  It the gain can change with temperature,
> presumably
> it would be due to any temperature sensitivity of the output node
> capacitance.
> Also, is there any mechanism that would cause the QE to change with
> temperature ?
> 
> 
> Thanks,
> 
> Ken Smith
> Routes Inc
> Canada
> 
> 
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